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Judul 3D V-Nand Solves Chip Design Limits Anodes Comply with Global Standard / TETSUO HIRAYAMA
Pengarang HIRAYAMA, Tetsuo
EDISI Edisi Vol. 18, Serial No. 207 Desember 2013
Penerbitan Dempa Asia Electronics Industry, 2013
Deskripsi Fisik 54 halaman :Tabel, Gambar ;21x28 cm
Catatan Technology Focus : Board Bending Gets Boost Timing Device Shapes up, Special Report : Components Hinge on New Phone Features
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#Edisi SerialTanggal terbit edisi serialEksemplar
1(belum diset)(belum diset)1
Tag Ind1 Ind2 Isi
001 INLIS000000000006350
005 20220610104913
005 20220610105133
008 220610################|##########|#|##
035 # # $a 0010-0622000211
082 # # $a 050.37
084 # # $a 050.37 HIR t
100 1 # $a HIRAYAMA, Tetsuo
245 1 # $a 3D V-Nand Solves Chip Design Limits Anodes Comply with Global Standard /$c TETSUO HIRAYAMA
250 # # $a Edisi Vol. 18, Serial No. 207 Desember 2013
260 # # :$b Dempa Asia Electronics Industry,$c 2013
300 # # $a 54 halaman : $b Tabel, Gambar ; $c 21x28 cm
500 # # $a Technology Focus : Board Bending Gets Boost Timing Device Shapes up, Special Report : Components Hinge on New Phone Features
990 # # $a 04/MJ-16
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